1
GATE ECE 2015 Set 1
Numerical
+1
-0
A 16 Kb (=16,384 bit) memory array is designed as a square with an aspect ratio of one (number of rows is equal to the number of columns). The minimum number of address lines needed for the row decoder is _______.
Your input ____
2
GATE ECE 1996
MCQ (Single Correct Answer)
+1
-0.3
Each cell of a static Random Access Memory Contains
A
6 MOS transistors.
B
4 MOS transistors and 2 capacitors
C
2 MOS transistors and 4 capacitors
D
1 MOS transistors and 1 capacitors
3
GATE ECE 1995
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of MOS transistors required to make a dynamic RAM cell is
A
1
B
2
C
3
D
4
4
GATE ECE 1994
MCQ (Single Correct Answer)
+1
-0.3
A PLA can be used
A
as a microprocessor
B
as a dynamic memory
C
to realize a sequential logic
D
to realize a combinational logic
GATE ECE Subjects
EXAM MAP
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
CBSE
Class 12