An npn BJT having reverse saturation current $$I_s\;=\;10^{-15}\;A$$ is biased in the forward active region with V_BE = 700 mV. The thermal voltage (V_T) is 25 mV and the current gain (β) may vary from 50 to 150 due to manufacturing variations. The maximum emitter current (in μA) is _____.

Consider two BJT's biased at the same collector current with area A₁ = 0.2 μm × 0.2 μm and A₂ = 300 μm × 300 μm. Assuming that all other device parameters are identical, kT/q = 26 mV, the intrinsic carrier concentration is 1 × 10¹⁰ cm^-3, and q = 1.6 × 10^-19 C, the difference between the base-emitter voltages (in mV) of the two BJT's (i.e., V_BE1 – V_BE2) is___________.

The channel resistance of an N-channel JFET shown in the figure below is 600 W when the full channel thickness (t_ch) of 10 μm is available for conduction. The built-in voltage of the gate P⁺N junction (V_bi) is -1 V. When the gate to source voltage (V_GS) is 0 V, the channel is depleted by 1 μm on each side due to the built in voltage and hence the thickness available for conduction is only 8 μm The channel resistance when V_GS = 0 V is

The channel resistance of an N-channel JFET shown in the figure below is 600 W when the full channel thickness (t_ch) of 10 μm is available for conduction. The built-in voltage of the gate P⁺N junction (V_bi) is -1 V. When the gate to source voltage (V_GS) is 0 V, the channel is depleted by 1 μm on each side due to the built in voltage and hence the thickness available for conduction is only 8 μm The channel resistance when V_GS = -3 V is