1
GATE ECE 2015 Set 1
Numerical
+2
-0
All the logic gates shown in the figure have a propagation delay of 20 ns. Let A = C = 0 and B = 1
until time t = 0. At t = 0, all the inputs flip (i.e., A = C = 1 and B = 0) and remain in that state. For
t > 0, output Z = 1 for a duration (in ns) of ______________.
Your input ____
2
GATE ECE 2015 Set 1
MCQ (Single Correct Answer)
+2
-0.6
A 3-input majority gate is defined by the logic function M (a,b,c) = ab+bc+ca. Which one of
the following gates is represented by the function M$$\left( {\overline {M\left( {a,b,c} \right),} M\left( {a,b,\overline c } \right),c} \right)?$$
3
GATE ECE 2015 Set 3
MCQ (Single Correct Answer)
+2
-0.6
A universal logic gate can implement any Boolean function by connecting sufficient number of
them appropriately. Three gates are shown.
Which one of the following statesments is TRUE?
4
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The output F in the digital logic circuit shown in the figure is
Questions Asked from Logic Gates (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude