1
GATE ECE 2015 Set 1
Numerical
+2
-0
All the logic gates shown in the figure have a propagation delay of 20 ns. Let A = C = 0 and B = 1 until time t = 0. At t = 0, all the inputs flip (i.e., A = C = 1 and B = 0) and remain in that state. For t > 0, output Z = 1 for a duration (in ns) of ______________. GATE ECE 2015 Set 1 Digital Circuits - Logic Gates Question 9 English
Your input ____
2
GATE ECE 2015 Set 1
MCQ (Single Correct Answer)
+2
-0.6
A 3-input majority gate is defined by the logic function M (a,b,c) = ab+bc+ca. Which one of the following gates is represented by the function M$$\left( {\overline {M\left( {a,b,c} \right),} M\left( {a,b,\overline c } \right),c} \right)?$$
A
3-Input NAND gate
B
3-Input XOR gate
C
3-Input NOR gate
D
3-Input XNOR gate
3
GATE ECE 2015 Set 3
MCQ (Single Correct Answer)
+2
-0.6
A universal logic gate can implement any Boolean function by connecting sufficient number of them appropriately. Three gates are shown. GATE ECE 2015 Set 3 Digital Circuits - Logic Gates Question 8 English 1 GATE ECE 2015 Set 3 Digital Circuits - Logic Gates Question 8 English 2

Which one of the following statesments is TRUE?

A
Gate 1 is a universal gate.
B
Gate 2 is a universal gate.
C
Gate 3 is a universal gate.
D
None of the gates shown is a universal gate.
4
GATE ECE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The output F in the digital logic circuit shown in the figure is GATE ECE 2014 Set 1 Digital Circuits - Logic Gates Question 11 English
A
$$F\, = \overline X YZ + X\overline Y Z$$
B
$$F\, = \overline X YZ + X\overline Y Z$$
C
$$F\, = \,\overline X \overline Y Z + XYZ$$
D
$$F\, = \,\overline X \overline Y \overline {Z + } XYZ$$
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