1
GATE ECE 1987
Subjective
+8
-0
A 2-input up/down synchrconous counter using two toggle flip-flops is shown in Fig.1. The counter's sequence is to be controlled by the input M as follows:
For M=1, sequence of Q1, Q0 is ..00, 01, 10, 11, 00, 01.......
For M=0, sequence of Q1, Q0 is ..00, 11, 10, 01, 00, 11......

(a)Design the necessary feedback logic for T1 and T0.

(b)Realize the feesback logic using inverters and 4-input multiplexers only. Use Q1 and Q0 as the control inputs of the multiplexer with Q1 as the MSB.

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 19 English
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