1
GATE ECE 2016 Set 2
Numerical
+2
-0
The switch S in the circuit shown has been closed for a long time. It is opened at time t = 0 and
remains open after that. Assume that the diode has zero reverse current and zero forward
voltage drop.
The steady state magnitude of the capacitor voltage VC (in volts) is ____________.
The steady state magnitude of the capacitor voltage VC (in volts) is ____________.Your input ____
2
GATE ECE 2015 Set 1
Numerical
+2
-0
In the circuit shown, switch SW is closed at t = 0. Assuming zero initial conditions, the value
of vc(t) (in Volts) at t= 1 sec is ___________.
Your input ____
3
GATE ECE 2015 Set 2
Numerical
+2
-0
In the circuit shown, the initial voltages across the capacitors
C1 and C2
are 1 V and 3 V,
respectively. The switch is closed at time t = 0. The total energy dissipated (in Joules) in the
resistor R until steady state is reached is _______________.


Your input ____
4
GATE ECE 2014 Set 4
Numerical
+2
-0
In the circuit shown in the figure, the value of V0(t) (in Volts) for $$t\rightarrow\infty$$ is ______.

Your input ____
GATE ECE Subjects
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Control Systems
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Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
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