(a) Write down the state table for the mod-5 counter.
(b)Obtain simplified SOP expressions for the inputs A2, B2, A1, B1, A0 and B0 in terms of Q2, Q1, Q and their complements.
(c) Hence, complete the circuit diagram for the mod-5 counter given in the figure using minimum number of 2-input NAND-gate only.
(a) Will the counter lockout if it happens to be in any one of the unused states?
(b) Find the maximum rate at which the counter will operate satisfactorily. Assume the propagation delays of flip-flop and AND gate to be tF and tA
The Clock has a period of 50ns and transitions take place at the rising clock edge.
(a) Give the sequence generated at Q0 till it repeats.
(b) What is the repetition rate for the generated sequence?