1

GATE ECE 2002

Subjective

+5

-0

It is required to design a binary mod-5 synchronus counter using AB flip-flops such that the output Q

_{2}Q_{1}Q_{0}changes as $$000 \to 001 \to 010$$ ........and so on. The excitation table for the AB flip-flops is given in the table(a) Write down the state table for the mod-5 counter.

(b)Obtain simplified SOP expressions for the inputs A_{2}, B_{2}, A_{1}, B_{1}, A_{0} and B_{0} in terms of Q_{2}, Q_{1}, Q_{} and their complements.

(c) Hence, complete the circuit diagram for the mod-5 counter given in the figure using minimum number of 2-input NAND-gate only.

2

GATE ECE 1999

Subjective

+5

-0

The circuit diagram of a synchronous counter is shown in the figure. Determine the
sequence of states of the counter assuming that the initial state is ‘000’. Give
your answer in a tabulor form showing the present state Q

_{A(n)}, Q_{B(n)}, Q_{C(n)}, J-K inputs ( J_{A}, K_{A}, J_{B}, K_{B}, J_{C}, K,) and the next state $${Q_{A\left( {n + 1} \right)}},\,{Q_{B\left( {n + 1} \right)}},{Q_{C\left( {n + 1} \right)}}$$ From the table, determine the modulus of the counter.3

GATE ECE 1998

Subjective

+5

-0

The mod-5 counter shown in figure counts through states Q

_{2}Q_{1}Q_{0}= 000, 001, 010, 011 and 100.(a) Will the counter lockout if it happens to be in any one of the unused states?

(b) Find the maximum rate at which the counter will operate satisfactorily. Assume the propagation delays of flip-flop and AND gate to be t_{F} and t_{A}

4

GATE ECE 1997

Subjective

+5

-0

A sequence generator is shown in figure. The counter status (Q

The Clock has a period of 50ns and transitions take place at the rising clock edge.

(a) Give the sequence generated at Q

(b) What is the repetition rate for the generated sequence?

_{0}Q_{1}Q_{3}) is intialized to 010 using preset/clear inputs.The Clock has a period of 50ns and transitions take place at the rising clock edge.

(a) Give the sequence generated at Q

_{0}till it repeats.(b) What is the repetition rate for the generated sequence?

Questions Asked from Sequential Circuits (Marks 5)

Number in Brackets after Paper Indicates No. of Questions

GATE ECE Subjects

Signals and Systems

Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous

Network Theory

Control Systems

Digital Circuits

General Aptitude

Electronic Devices and VLSI

Analog Circuits

Engineering Mathematics

Microprocessors

Communications

Electromagnetics