1
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+1
-0.3
In the $$RLC$$ circuit shown in the figure, the input voltage is given by vi(t) = 2 cos(200t)+4 sin(500t). The output voltage v0(t) is
2
GATE ECE 2016 Set 2
Numerical
+1
-0
The figure shows an $$RLC$$ circuit with a sinusoidal current source.
At response, the ratio $$\left| {{{\rm I}_L}} \right|/\left| {{{\rm I}_R}} \right|$$, i.e., the ratio of the magnitudes of the inductor current phasor and the resistor current phasor, is _________.
Your input ____
3
GATE ECE 2015 Set 3
Numerical
+1
-0
At very high frequencies, the peak output voltage V0 (in Volts) is ______.
Your input ____
4
GATE ECE 2015 Set 2
Numerical
+1
-0
The voltage (VC) across the capacitor (in Volts) In the network shown is ________.
Your input ____
Questions Asked from Sinusoidal Steady State Response (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE 2023 (1)
GATE ECE 2017 Set 2 (1)
GATE ECE 2017 Set 1 (1)
GATE ECE 2016 Set 3 (1)
GATE ECE 2016 Set 2 (1)
GATE ECE 2015 Set 3 (1)
GATE ECE 2015 Set 2 (1)
GATE ECE 2015 Set 1 (1)
GATE ECE 2010 (1)
GATE ECE 2007 (1)
GATE ECE 2005 (1)
GATE ECE 2004 (2)
GATE ECE 2003 (1)
GATE ECE 2000 (1)
GATE ECE 1998 (1)
GATE ECE 1996 (2)
GATE ECE 1995 (4)
GATE ECE 1994 (1)
GATE ECE 1993 (1)
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics