1
GATE ECE 2016 Set 3
MCQ (Single Correct Answer)
+1
-0.3
In the $$RLC$$ circuit shown in the figure, the input voltage is given by vi(t) = 2 cos(200t)+4 sin(500t). The output voltage v0(t) is GATE ECE 2016 Set 3 Network Theory - Sinusoidal Steady State Response Question 34 English
A
cos(200t) + 2 sin(500t)
B
2cos(200t) + 4 sin(500t)
C
sin(200t) + 2 cos(500t)
D
2sin(200t) + 4 cos(500t)
2
GATE ECE 2015 Set 2
Numerical
+1
-0
The voltage (VC) across the capacitor (in Volts) In the network shown is ________.

GATE ECE 2015 Set 2 Network Theory - Sinusoidal Steady State Response Question 37 English
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3
GATE ECE 2015 Set 1
Numerical
+1
-0
In the circuit shown, at resonance, the amplitude of the sinusoidal voltage (in Volts) across the capacitor is ___________.

GATE ECE 2015 Set 1 Network Theory - Sinusoidal Steady State Response Question 61 English
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4
GATE ECE 2015 Set 3
Numerical
+1
-0
At very high frequencies, the peak output voltage V0 (in Volts) is ______. GATE ECE 2015 Set 3 Network Theory - Sinusoidal Steady State Response Question 36 English
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