1
GATE ECE 1999
Subjective
+5
-0
In certain application, four inputs A, B, C, D (both true and complement forms available)are fed to logic circuit, producing an output F which operates a relay. The relay turns on when F(ABCD)=1 for the following states of the inputs (ABCD):'0000', '0010' ,0101',0110','1101' and '1110'. States '1000' and '1001' do not occur, and for the remaining states, the relay is off. Minaining states, the relay is off. Minimize F with the help of a Karnaugh map and realize it using a minimum number of 3- input NAND gates.
2
GATE ECE 1996
Subjective
+5
-0
Its is desired to generate the following three Boolean functions.
$$\eqalign{
& {F_1} = a\,\overline b \,c + \overline a \,b\overline c + bc \cr
& {F_2} = \,a\,\overline b \,c + ab + \overline a \,b\overline c \cr
& {F_3} = \,\overline a \,\overline b \,\overline c + abc + \overline a c \cr} $$
By using an OR gate array as shown in figure where $${P_{1\,}}\,to\,{P_5}$$ are the product terms in one or more of the variables a, $$\overline a $$, b, $$\,\overline b $$, c and $$\overline c $$.

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Control Systems
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Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Fourier Transform Representation of Continuous Time Signal Fourier Series Transmission of Signal Through Continuous Time LTI Systems Miscellaneous Sampling Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Discrete Time Signal Z Transform Transmission of Signal Through Discrete Time Lti Systems
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