A 12-bit ADC is operating with a 1$$\mu $$ sec clock period and the total conversion time is seen to be 14 $$\mu $$ sec. The ADC must br of the

Match the List-1 (type of 8-bit ADC) with List-2(Minimum conversion time in clock cycles)

List - 1

A. Successive approximation
B. Dual-slope
C. Parallel Comparator

List - 2

1) 1
2) 8
3) 16
4) 256
5) 512

Which of the resistance networks of figure can be used as 3 bit R-2R ladder DAC. Assume $${V_0}$$ corresponds to LSB.