There are four chips each of 1024 bytes connected to a 16 bit address bus as shown in the figure below. RAMs 1,2,3 and 4 respectively are mapped to addresses

An I/O peripheral device shown in figure (b) below is to be interfaced to an 8085 microprocessor. To select the I/O device in the I/O address range D4H – D7H, its chip-select (CS) should be connected to the output of the decoder shown in figure (a) below:

What memory address range is NOT represented by chip 1 and chip 2 in figure? A₀ to A₁₅ in this figure are the address lines and CS means Chip Select.

The 8255 Programmable Peripheral Interface is used as described below.

I. An A/D converter is interfaced to a microprocessor through an 8255. the conversion is initiated by a signal from the 8255 on Port C. A signal on Port C causes data to be strobed into Port A.

II. Two computers exchange data using a pair of 8255s. Port A works as a bidirectional data port supported by appropriate handshaking signals.

The appropriate modes of operation of the 8255 for I and II would be