1
GATE ECE 2006
MCQ (Single Correct Answer)
+2
-0.6
An I/O peripheral device shown in figure (b) below is to be interfaced to an 8085
microprocessor. To select the I/O device in the I/O address range D4H – D7H,
its chip-select (CS) should be connected to the output of the decoder shown in
figure (a) below:
2
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
What memory address range is NOT represented by chip 1 and chip 2 in
figure? A0 to A15 in this figure are the address lines and CS means Chip Select.
3
GATE ECE 2004
MCQ (Single Correct Answer)
+2
-0.6
The 8255 Programmable Peripheral Interface is used as described below.
I. An A/D converter is interfaced to a microprocessor through an 8255. the conversion is initiated by a signal from the 8255 on Port C. A signal on Port C causes data to be strobed into Port A.
II. Two computers exchange data using a pair of 8255s. Port A works as a bidirectional data port supported by appropriate handshaking signals.
The appropriate modes of operation of the 8255 for I and II would be4
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
An 8085 microprocessor based system uses a 4K × 8-bit RAM whose starting
address is AA00H. The address of the last byte in this RAM is
Questions Asked from Pin Details of 8085 and Interfacing with 8085 (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude