1
GATE ECE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
For the 8085 microprocessor, the interfacing circuit to input 8-bit digital data (DI0 – DI7)
from an external device is shown in the figure. The instruction for correct data transfer is
2
GATE ECE 2013
MCQ (Single Correct Answer)
+2
-0.6
There are four chips each of 1024 bytes connected to a 16 bit address bus as
shown in the figure below. RAMs 1,2,3 and 4 respectively are mapped to
addresses
3
GATE ECE 2006
MCQ (Single Correct Answer)
+2
-0.6
An I/O peripheral device shown in figure (b) below is to be interfaced to an 8085
microprocessor. To select the I/O device in the I/O address range D4H – D7H,
its chip-select (CS) should be connected to the output of the decoder shown in
figure (a) below:
4
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
What memory address range is NOT represented by chip 1 and chip 2 in
figure? A0 to A15 in this figure are the address lines and CS means Chip Select.
Questions Asked from Pin Details of 8085 and Interfacing with 8085 (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude