ExamSIDE (Powered by ExamGOAL)
Questions
NEXT
1
GATE ECE 2017 Set 1
MCQ (Single Correct Answer)
+2
-0.6
The following five instructions were executed on an 8085 microprocessor.
MVI A, 33H
MVI B, 78H
ADD B
CMA
ANI 32H

The Accumulator value immediately after the execution of the fifth instruction is

A
00H
B
10H
C
11H
D
32H
2
GATE ECE 2016 Set 1
MCQ (Single Correct Answer)
+2
-0.6
In an 8085 system, a PUSH operation requires more clock cycles than a POP operation. Which one of the following options is the correct reason for this?
A
For POP, the data transceivers remain in the same direction as for instruction fetch (memory to processor), whereas for PUSH their direction has to be reversed.
B
Memory write operations are slower than memory read operations in an 8085 based system.
C
The stack pointer needs to be pre-decremented before writing registers in a PUSH, whereas a POP operation uses the address already in the stack pointer.
D
Order of registers has to be interchanged for a PUSH operation, whereas POP uses their natural order.
3
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+2
-0.6
An 8085 microprocessor executes “STA 1234H” with starting address location 1FFEH (STA copies the contents of the Accumulator to the 16-bit address location). While the instruction is fetched and executed, the sequence of values written at the address pins $${A_{15}}$$ − $${A_{8}}$$ is
A
1FH, 1FH, 20H, 12H
B
1FH, FEH, 1FH, FFH, 12H
C
1FH, 1FH, 12H, 12H
D
1FH, 1FH, 12H, 20H, 12H
4
GATE ECE 2011
MCQ (Single Correct Answer)
+2
-0.6
An 8085 assembly language program is given below. Assume that the carry flag is initially unset. The content of the accumulator after the execution of the program is
MVI A,07H
RLC
MOV B,A
RLC
RLC
ADD B
RRC
A
8C H
B
64 H
C
23 H
D
15 H
NEXT
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Network Theory
State Equations For Networks Network Elements Network Theorems Two Port Networks Transient Response Sinusoidal Steady State Response Network Graphs Miscellaneous
Control Systems
Basic of Control Systems Signal Flow Graph and Block Diagram Time Response Analysis Stability Root Locus Diagram Frequency Response Analysis Compensators State Space Analysis
Digital Circuits
Number System and Code Convertions Boolean Algebra Logic Gates Combinational Circuits Sequential Circuits Semiconductor Memories Logic Families Analog to Digital and Digital to Analog Converters
General Aptitude
Numerical Ability Logical Reasoning Verbal Ability
Electronic Devices and VLSI
Semiconductor Physics PN Junction BJT and FET IC Basics and MOSFET
Analog Circuits
Diodes Bipolar Junction Transistor Frequency Response FET and MOSFET Oscillators Operational Amplifier Feedback Amplifier Power Amplifier 555 Timer
Engineering Mathematics
Linear Algebra Calculus Vector Calculus Probability and Statistics Differential Equations Complex Variable Numerical Methods Transform Theory
Microprocessors
Instruction Set and Programming with 8085 Pin Details of 8085 and Interfacing with 8085
Communications
Fundamentals of Information Theory Noise In Digital Communication Analog Communication Systems Digital Communication Systems Random Signals and Noise
Electromagnetics
Waveguides Antennas Miscellaneous Transmission Lines Maxwell Equations Uniform Plane Waves
EXAM MAP
Joint Entrance Examination
JEE MainJEE AdvancedWB JEEBITSATMHT CETKCETCOMEDKVITEEEAP EAPCET
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12