1
GATE ECE 1987
Subjective
+8
-0
The circuit diagram of a 2 bit A to D converter is shown in figure below. The combinational logic is to be disigned to provide a natural binary representation using $${D_1}$$ and $${D_0}$$ for the analog input $${V_i}$$. $${D_1}$$ is to be the most significant bit.
(a) Draw the Karnaugh maps for $${D_1}$$ and $${D_0}$$ in terms of $${C_2}$$, $${C_1}$$ and $${C_0}$$
(b) Obtain the minimal sum of products expressions for $${D_1}$$ and $${D_0}$$.
(c) Realize the logic for $${D_1}$$ and $${D_0}$$ using 2- input NAND gates only.
(d) Find the resolution of the Ato D converter.
(a) Draw the Karnaugh maps for $${D_1}$$ and $${D_0}$$ in terms of $${C_2}$$, $${C_1}$$ and $${C_0}$$
(b) Obtain the minimal sum of products expressions for $${D_1}$$ and $${D_0}$$.
(c) Realize the logic for $${D_1}$$ and $${D_0}$$ using 2- input NAND gates only.
(d) Find the resolution of the Ato D converter.
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