1
GATE ECE 1992
MCQ (More than One Correct Answer)
+1
-0
In an 8085 microprocessor system with memory mapped I/O,
2
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
A 8bit $$\mu $$p has 16bit address bus. A 1KB memory chip is interfaced to processor as shown ib figure. The address range for the chip is _____________.
3
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
A microprocessor with a 16-bit address bus is used in a linear memory selection configuration (i.e. Address bus lines are directly used as chip selects of memory chips) with 4 memory chips. The maximum addressable memory space is
4
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
For a microprocessor system using I/O-mapped I/O the following statement(s) is NOT true
Questions Asked from Pin Details of 8085 and Interfacing with 8085 (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Network Theory
Control Systems
Electronic Devices and VLSI
Analog Circuits
Digital Circuits
Microprocessors
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Communications
Electromagnetics
General Aptitude