1

GATE ECE 1998

MCQ (Single Correct Answer)

+1

-0.3

An I/O processor control the flow of information between

2

GATE ECE 1997

MCQ (Single Correct Answer)

+1

-0.3

In an 8085$$\mu$$P system, the RST instruction will cause an interrupt

3

GATE ECE 1997

MCQ (Single Correct Answer)

+1

-0.3

The decoding circuit shown below has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $${A_0}$$ to $${A_7}$$ for I-O address)

4

GATE ECE 1995

MCQ (Single Correct Answer)

+1

-0.3

In a microprocessor, when a CPU is interrupted, it

Questions Asked from Pin Details of 8085 and Interfacing with 8085 (Marks 1)

Number in Brackets after Paper Indicates No. of Questions

GATE ECE Subjects

Signals and Systems

Representation of Continuous Time Signal Fourier Series Fourier Transform Continuous Time Signal Laplace Transform Discrete Time Signal Fourier Series Fourier Transform Discrete Fourier Transform and Fast Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Discrete Time Linear Time Invariant Systems Transmission of Signal Through Continuous Time LTI Systems Sampling Transmission of Signal Through Discrete Time Lti Systems Miscellaneous

Network Theory

Control Systems

Digital Circuits

General Aptitude

Electronic Devices and VLSI

Analog Circuits

Engineering Mathematics

Microprocessors

Communications

Electromagnetics