The Boolean function f implemented in the figure using two input multiplexers is

The given figure shows a ripple counter using positive edge triggered flip-flops. If the present state of counter is Q₂ Q₁ Q₀ = 011, then its next state ( Q₂ Q₁ Q₀ ) will be

The present output Q_n of an edge triggered JK flip-flop is logic 0. If J=1, then Q_n+1

The transistors used in a portion of the TTL gate shown in figure have β=100. the base-emitter voltage of is 0.7V for a transistor in active region and 0.75V for a transistor in saturation . If the sink current I=1mA and the output is at logic 0, then the current $${I_R}$$ I will be equal to