1
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
What memory address range is NOT represented by chip 1 and chip 2 in
figure? A0 to A15 in this figure are the address lines and CS means Chip Select.
2
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
The h parameters of the circuit shown in Fig. are
3
GATE ECE 2005
MCQ (Single Correct Answer)
+1
-0.3
The ABCD parameters of an ideal n:1 transformer shown in Fig. are $$\left[ {\matrix{
n & 0 \cr
0 & X \cr
} } \right]$$. The value of X will be
4
GATE ECE 2005
MCQ (Single Correct Answer)
+2
-0.6
For the circuit in figure, the phase current $${{\rm I}_1}$$ is
Paper analysis
Total Questions
Analog Circuits
13
Communications
8
Control Systems
10
Digital Circuits
7
Electromagnetics
8
Electronic Devices and VLSI
7
Engineering Mathematics
11
Microprocessors
3
Network Theory
10
Signals and Systems
14
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