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## GATE ECE 1997

Exam Held on Thu Jan 01 1970 00:00:00 GMT+0000 (Coordinated Universal Time)
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## GATE ECE

The transistor in the circuit shown in the figure. is so biased (dc biasing N/W ...
In the cascade amplifier circuit shown below, determine the values of R<sub>1</s...
An Amplifier a has 6 dB gain and 50 $$\Omega$$ input and output impedances. Th...
Negative feedback in <p>1. Voltage series configuration <br>2.Current shunt co...
An IC 555 chip has been used to construct a pulse generator. Typical pin connect...
The output voltage V<sub>0</sub> of the circuit shown in the figure is <img cla...
Consider the circuit given in fig. using an ideal operational Amplifier. <img cl...
The line code that has zero dc component for pulse transmission of random binary...
A deterministic signal has the power spectrum given in figure. The minimum sampl...
A probability density function is given by $$p(x) = \,K\,\,\exp \,\,( - \,{x^2}/... In the signal flow graph of Fig. y/x equals <img alt="gate 1997 control-systems ... Following fig. shows the block diagram representation of control system. The sys... A certain linear time invariant system has the state and the output equations gi... <img class="question-image" src="https://gateclass.cdn.examgoal.net/examside/que... A signed integer has been stored in a byte using the 2's complement format. We w... The output of the logic gate in figure is <img class="question-image" src="http... A 2-bit binary multiplier can be implemented using In a J_K flip-flop, we have J=$$\overline Q $$and K=1 (see figure). Assuming th... In standard TTL the 'totem pole' stage refers to The inverter 74AL SO4 has the following specifications: <br>$${I_{OH}}{\,_{\ma...
For the NMOS logic gate shown in figure, the logic function implemented is <img...
The gate delay of an NMOS inverter is dominated by charge time rather than disch...
A sequence generator is shown in figure. The counter status (Q<sub>0</sub> Q<sub...
A transmission line of 50$$\Omega$$ characteristic impedance is terminated with...
A $${\lambda \over 2}$$ section of a 600 $$\Omega$$ transmission line, short c...
A uniform plane wave is normally incident from air on an infinitely thick magnet...
A rectangular air-filled waveguide has a cross section of $$4\,cm\,\, \times \,\... A parabolic dish antenna has a conical beam 2<sup>0</sup> wide. The directivity ... A dipole antenna has a sin$$\theta $$radiation pattern where the angle$$\theta...
The units of $$\frac q{KT}$$ are
The curve given by the equation $${x^2} + {y^2} = 3axy$$ is
The laplace transform of $${e^{\alpha t}}\,\cos \,\alpha \,t$$ is equal to _____...
In an 8085$$\mu$$P system, the RST instruction will cause an interrupt
The decoding circuit shown below has been used to generate the active low chip s...
The following instructions have been executed by an 8085 $$\mu$$P <img class="q...
<p>The current "i<sub>4</sub>" in the circuit of Fig. is equal to</p> <img class...
<p>The voltage V in Fig. is equal to</p> <img class="question-image" src="https:...
<p>The voltage V in Fig. is</p> <img alt="GATE 1997 Network Theory Network Eleme...
<p>The voltage V in Fig. is always equal to</p> <img alt="GATE 1997 Network Theo...
<p>In the circuit of Fig. when R = 0 Ω, the current i<sub>R</sub> equals 10 A.</...
<img alt="gate 1997 network-theory state-equations-for-networks (gate-ece) subje...
In the circuit of Fig., the current i<sub>D</sub> through the ideal diode (zero ...
In the circuit of Fig., energy absorbed by the 4 Ω registor in the time interval...
In the circuit of Fig., all currents and voltage are sinusoids of frequency $$\o... In the circuil of Fig. the equivalent impedance seen across terminals A. B is <... The function f(t) has the Fourier Transform g($$\omega $$). The Fourier Transfor... The power spectral density of a deterministic signal is given by$${\left[ {\sin...
If the Fourier Transfrom of a deterministic signal g(t) is G (f), then <p> <b> I...
The Laplace Transform of e<sub>at</sub> .cos\left( {\alpha t} \right).u\left( ...
Match each of the items 1, 2 on the left with the most appropriate item A, B, C ...
Fig.1, shows the block diagram representation of a control system. The system in...
In Fig. 1, a linear time invariant discrete system is shown. Blocks labeled D re...

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