1
GATE ECE 2014 Set 4
MCQ (Single Correct Answer)
+1
-0.3
For a given sample-and-hold circuit, if the value of the hold capacitor is increased, then
2
GATE ECE 2014 Set 3
Numerical
+1
-0
The figure shows a half-wave rectifier. The diode D is ideal. The average steady-state current
(in Amperes) through the diode is approximately ____________.
Your input ____
3
GATE ECE 2012
MCQ (Single Correct Answer)
+1
-0.3
The diodes and capacitors in the circuit shown are ideal. The voltage v(t)
across the diode D1 is
4
GATE ECE 2003
MCQ (Single Correct Answer)
+1
-0.3
The circuit shown in figure is best described as a
Questions Asked from Diodes (Marks 1)
Number in Brackets after Paper Indicates No. of Questions
GATE ECE Subjects
Signals and Systems
Representation of Continuous Time Signal Fourier Series Discrete Time Signal Fourier Series Fourier Transform Discrete Time Signal Z Transform Continuous Time Linear Invariant System Transmission of Signal Through Continuous Time LTI Systems Discrete Time Linear Time Invariant Systems Sampling Continuous Time Signal Laplace Transform Discrete Fourier Transform and Fast Fourier Transform Transmission of Signal Through Discrete Time Lti Systems Miscellaneous Fourier Transform
Network Theory
Control Systems
Digital Circuits
General Aptitude
Electronic Devices and VLSI
Analog Circuits
Engineering Mathematics
Microprocessors
Communications
Electromagnetics