In the following circuit, the comparator output is logic “I” if V₁ > V₂ and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b₃(MSB), b₂, b₁ and b₀ (LSB) are the counter outputs.

The counter starts from the clear state.

The magnitude of the error between V_DAC and V_in at steady state in volts is

In the following circuit, the comparator output is logic “I” if V₁ > V₂ and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b₃(MSB), b₂, b₁ and b₀ (LSB) are the counter outputs.

The counter starts from the clear state.

The stable reading of the LED display is

The logic function implemented by the following circuit at the terminal OUT is

For each of the positive edge-triggered J-K flip flop used in the following future, the propagation delay is $$\Delta $$T

Which of the following waveforms correctly represents the output at Q₁?