In the following circuit, the comparator output is logic “I” if V₁ > V₂ and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b₃(MSB), b₂, b₁ and b₀ (LSB) are the counter outputs.

The counter starts from the clear state.

The magnitude of the error between V_DAC and V_in at steady state in volts is

In the following circuit, the comparator output is logic “I” if V₁ > V₂ and is logic “0” otherwise. The D/A conversion is done as per the relation $$${V_{DAC}} = \sum\limits_{n = 0}^3 {{2^{n - 1}}{b_n}\,\,} Volts,$$$ where b₃(MSB), b₂, b₁ and b₀ (LSB) are the counter outputs.

The counter starts from the clear state.

The stable reading of the LED display is

The value of the integral of the function $$\mathrm g\left(\mathrm x,\mathrm y\right)=4\mathrm x^3\;+\;10\mathrm y^4$$ along the straight line segment from the point (0, 0) to the point (1, 2) in the x-y plane is

One end of loss-less transmission line having the characteristic impedance of 75 $$\Omega $$ and length of 1 cm is short-ciruited. At 3 GHz, the input impedance at the other end of the transmission line is