1
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
The logic function implemented by the following circuit at the terminal OUT is GATE ECE 2008 Digital Circuits - Logic Families Question 3 English
A
P NOR Q
B
P NAND Q
C
P OR Q
D
P AND Q
2
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For each of the positive edge-triggered J-K flip flop used in the following future, the propagation delay is $$\Delta $$T GATE ECE 2008 Digital Circuits - Sequential Circuits Question 39 English

Which of the following waveforms correctly represents the output at Q1?

A
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 39 English Option 1
B
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 39 English Option 2
C
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 39 English Option 3
D
GATE ECE 2008 Digital Circuits - Sequential Circuits Question 39 English Option 4
3
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
Which of the follwing Boolean expression correctly represents the relation between P, Q, R and M1?

GATE ECE 2008 Digital Circuits - Logic Gates Question 12 English
A
M1=(P OR Q) XOR R
B
M1=(P AND Q) XOR R
C
M1=(P NOR Q) XOR R
D
M1=(P XOR Q) XOR R
4
GATE ECE 2008
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown in the following figure $${I_0}$$ - $${I_3}$$ are inputs to the 4:1 multiplexer R(MSB) and S are control bits. tHE OUTPUT Zcan be represented by GATE ECE 2008 Digital Circuits - Combinational Circuits Question 30 English
A
PQ+P$$\overline {Q\,} S + \,\overline {Q\,} \overline R \,\overline S $$
B
$$P\,\overline {Q\,} + PQ\,\overline R \, + \,\overline R \,\overline {Q\,} \,\overline S $$
C
$$P\,\overline {Q\,} \overline R + \overline P \,QR + PQRS + \overline {Q\,} \overline R \,\overline S $$
D
$$PQ\,\overline R + PQR\,\overline S + P\overline {Q\,} \overline R \,S + \overline {Q\,} \overline R \,\overline S $$
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