1
GATE CSE 2022
MCQ (Single Correct Answer)
+1
-0.33

Consider a digital display system (DDS) shown in the figure that displays the contents of register X. A 16-bit code word is used to load a word in X, either from S or from R. S is a 1024-word memory segment and R is a 32-word register file. Based on the value of mode bit M, T selects an input word to load in X. P and Q interface with the corresponding bits in the code word to choose the addressed word. Which one of the following represents the functionality of P, Q, and T?

GATE CSE 2022 Digital Logic - Sequential Circuits Question 3 English

A
P is 10 : 1 multiplexer; Q is 5 : 1 multiplexer; T is 2 : 1 multiplexer
B
P is 10 : 210 decoder; Q is 5 : 25 decoder; T is 2 : 1 encoder
C
P is 10 : 210 decoder; Q is 5 : 25 decoder; T is 2 : 1 multiplexer
D
P is 1 : 10 de-multiplexer; Q is 1 : 5 de-multiplexer; T is 2 : 1 multiplexer
2
GATE CSE 2018
Numerical
+1
-0
Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered $$D$$ flip-flops. GATE CSE 2018 Digital Logic - Sequential Circuits Question 5 English

The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of “in” is _____.

Your input ____
3
GATE CSE 2016 Set 1
Numerical
+1
-0
We want to design a synchronous counter that counts the sequence $$0-1-0-2-0-3$$ and then repeats. The minimum number of $$J-K$$ flip-flops required to implement this counter is _________.
Your input ____
4
GATE CSE 2015 Set 2
Numerical
+1
-0
The minimum number of $$JK$$ flip-flops required to construct a synchronous counter with the count sequence $$\left( {0,0,1,1,2,2,3,3,0,0,...} \right)$$ is ____________.
Your input ____
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