Alu Data Path and Control Unit · Computer Organization · GATE CSE

Start Practice

Marks 2

GATE CSE 2018
Consider the following processor design characteristics. $$\,\,\,\,\,\,\,{\rm I}.\,\,\,\,\,$$ Register-to-register arithmetic operations only $$\,\,\,...
GATE CSE 2016 Set 1
The size of the data count register of a $$DMA$$ controller is $$16$$ bits. The processor needs to transfer a file of $$29,154$$ kilobytes from disk t...
GATE CSE 2013
Consider the following sequence of micro-operations $$\eqalign{ & \,\,\,\,\,\,\,\,\,\,\,\,\,MBR\,\,\,\,\,\,\, \leftarrow PC \cr & \,\,\,...
GATE CSE 2005
Consider the following data path of a $$CPU$$ The, $$ALU$$, the bus and all the registers in the data path are of identical size. All operations in...
GATE CSE 2005
Consider the following data path of a $$CPU$$ The, $$ALU$$, the bus and all the registers in the data path are of identical size. All operations in...
GATE CSE 2004
The microinstructions stored in the control memory of a processor have a width of $$26$$ bits. Each microinstruction is divided into three fields: a m...
GATE CSE 2002
Horizontal micro programming
GATE CSE 2001
Arrange the following configuration for CPU in decreasing order of operating speeds: Hardwired control, vertical micro- programming, horizontal micro-...
GATE CSE 2001
Consider the following datapath of a simple non-pipelined $$CPU.$$ The registers $$A,B,$$ $${A_1},{A_2},$$ $$MDR,$$ the bus and the $$ALU$$ are $$8$$-...
GATE CSE 1999
The main difference (s) between a $$CISC$$ and a $$RISC$$ processor is/are that a $$RISC$$ processor typically:
EXAM MAP
Medical
NEET
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
CBSE
Class 12