Combinational Circuits · Digital Logic · GATE CSE

Which one of the following circuits implements the Boolean function given below? f(x, y,z) = m0 + m1 + m3 +m4 + m5 + m6, where mi is the ith minterm....

A multiplexer is placed between a group of 32 registers and an accumulator to regulate data movement such that at any given point in time the content ...

If there are m input lines and n output lines for a decoder that is used to uniquely address a byte addressable 1 KB RAM, then the minimum value of m ...

In the following truth table $$V=1$$ if and only if the input is valid. What function does the truth table represent?...

The Boolean expression for the output $$f$$ of the multiplexer shown below is ...

How many $$3$$ to $$8$$ decodes with an enable input are needed to construct to constant $$6$$ to $$64$$ line decoder without using any other logic ga...

Consider the two cascaded $$2$$-to-$$1$$ multiplexers as shown in the figure. The minimal sum of products form of the output $$X$$ is...

Consider the $$4$$-to-$$1$$ multiplexer with two select lines $${S_1}$$ and $${S_0}$$ given below The minimal sum-of-products form of the Boolean ex...

Suppose only one multiplexer and one inverter are allowed to be used to implement any Boolean function of $$n$$ variables. What is the minimum size of...

Consider the circuit above. Which one of the following options correctly represents $$f(x,y,z)?$$ ...

Consider the $$ALU$$ shown below If the operands are in $$2's$$ complement representation, which of the following operations can be performed by sui...

Consider the following multiplexer where $$10, 11, 12, 13$$ are four data input lines selected by two address line combinations $${A_1}\,{A_0} = 00,01...

Consider the circuit shown below. The output of a $$2:1$$ Mux is given by the function $$(ac+bc)$$ Which of the following is true?...

Consider the circuit in Fig. Which has a four bit binary number $${b_3}\,{b_2}\,{b_1}\,{b_0}\,$$ as input and a five bit binary number $${d_3}\,{d_2}\...

Consider the circuit in fig shown $$f$$ implements ...

Fill in the blanks: In the two bit full-adder/sub tractor unit shown in Fig., when the switch is in position $$2.$$ $$.....$$ using $$.....$$ arithm...