IO Interface · Computer Organization · GATE CSE

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Marks 1

GATE CSE 2024 Set 2
Consider a computer with a 4 MHz processor. Its DMA controller can transfer 8 bytes in 1 cycle from a device to main memory through cycle stealing at ...
GATE CSE 2024 Set 1
Which one of the following statements is FALSE?
GATE CSE 2023
A keyboard connected to a computer is used at a rate of 1 keystroke per second. The computer system polls the keyboard every 10 ms (milli seconds) to ...
GATE CSE 2022
Which one of the following facilitates transfer of bulk data from hard disk to main memory with the highest throughput?
GATE CSE 2021 Set 2
Consider a computer system with DMA support. The DMA module is transferring one 8-bit character in one CPU cycle from a device to memory through cycle...
GATE CSE 2011
A computer handles several interrupt sources of which of the following are relevant for this question. $$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from $...
GATE CSE 2009
A $$CPU$$ generally handles an interrupt by executing an interrupt service routine
GATE CSE 2005
Normally user programs are prevented from handling $${\rm I}/O$$ directly by $${\rm I}/O$$ instructions in them. For $$CPUs$$ having explicit $${\rm I...
GATE CSE 2004
How many $$8$$-bit characters can be transmitted per second over $$9600$$ baud serial communication link using a parity synchronous mode of transmissi...
GATE CSE 2004
Which one of the following is true for a $$CPU$$ having a single interrupt request line and single interrupt grant line?
GATE CSE 2002
In serial data transmission, every byte of data is padded with a $$‘0’$$ in the beginning and one or two $$‘1’s$$ at the end of byte because
GATE CSE 2001
A processor needs software interrupt to
GATE CSE 1998
Which of the following device should get higher priority on assigning interrupts?
GATE CSE 1998
Which of the following is true?
GATE CSE 1997
The correct matching for the following pairs is ...
GATE CSE 1996
It gives non-uniform priority to various devices.
GATE CSE 1995
In a vectored interrupt
GATE CSE 1992
Start and stop bits do not contain 'information' but these are used in serial communication for

Marks 2

GATE CSE 2018
The following are some events that occur after a device controller issues an interrupt while process $$L$$ is under execution. $$(P)$$ The processor p...
GATE CSE 2011
On a non-pipe-lined sequential processor, a program segment, which is a part of the interrrupt service routine, is given to transfer $$500$$ bytes fro...
GATE CSE 2005
Consider the disk drive with the following specifications $$16$$ surfaces, $$512$$ tracks/surface, $$512$$ sectors/track, $$1$$ $$KB/sector$$, rotatio...
GATE CSE 2005
A device with data transfer rate $$10$$ $$KB/sec$$ is connected to a $$CPU.$$ Data is transferred byte-wise. Let the interrupt overhead be $$4$$ $$\mu...
GATE CSE 2004
A Hard disk with a transfer rate of $$10Mbytes/second$$ is constantly transferring data to memory using $$DMA.$$ The processor runs at $$600MHz$$ and ...
GATE CSE 2000
A graphics card has on board memory of $$1$$ $$MB.$$ Which of the following modes can the card not support?
GATE CSE 1999
RAID configurations of disks are used to provide
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