1
GATE EE 2015 Set 2
MCQ (Single Correct Answer)
+2
-0.6
In the following sequential circuit, the initial state (before the first clock pulse) of the circuit is $${Q_1}{Q_0}$$ $$=00.$$ The state $$\left( {{Q_1}{Q_0}} \right),$$ immediately after the $${333^{rd}}$$ clock pulse is GATE EE 2015 Set 2 Digital Electronics - Sequential Circuits Question 10 English
A
$$00$$
B
$$01$$
C
$$10$$
D
$$11$$
2
GATE EE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
A $$JK$$ flip flop can be implemented by $$T$$ flip flops. Identify the correct implementation.
A
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 1
B
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 2
C
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 3
D
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 4
3
GATE EE 2013
MCQ (Single Correct Answer)
+2
-0.6
The clock frequency applied to the digital circuit shown in the figure below is $$1$$ $$kHz.$$ If the initial state of the output $$Q$$ of the flip-flop is $$‘0’,$$ then the frequency of the output waveform $$Q$$ in $$kHz$$ is GATE EE 2013 Digital Electronics - Sequential Circuits Question 13 English
A
$$0.25$$
B
$$0.5$$
C
$$1$$
D
$$2$$
4
GATE EE 2012
MCQ (Single Correct Answer)
+2
-0.6
The state transition diagram for the logic circuit shown is GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English
A
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 1
B
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 2
C
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 3
D
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 4
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