1
GATE EE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
A $$JK$$ flip flop can be implemented by $$T$$ flip flops. Identify the correct implementation.
A
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 1
B
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 2
C
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 3
D
GATE EE 2014 Set 2 Digital Electronics - Sequential Circuits Question 12 English Option 4
2
GATE EE 2013
MCQ (Single Correct Answer)
+2
-0.6
The clock frequency applied to the digital circuit shown in the figure below is $$1$$ $$kHz.$$ If the initial state of the output $$Q$$ of the flip-flop is $$‘0’,$$ then the frequency of the output waveform $$Q$$ in $$kHz$$ is GATE EE 2013 Digital Electronics - Sequential Circuits Question 13 English
A
$$0.25$$
B
$$0.5$$
C
$$1$$
D
$$2$$
3
GATE EE 2012
MCQ (Single Correct Answer)
+2
-0.6
The state transition diagram for the logic circuit shown is GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English
A
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 1
B
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 2
C
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 3
D
GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English Option 4
4
GATE EE 2011
MCQ (Single Correct Answer)
+2
-0.6
A two-bit counter circuit is shown below GATE EE 2011 Digital Electronics - Sequential Circuits Question 15 English

It the state $${Q_A}{Q_B}$$ of the counter at the clock time $${t_n}$$ is $$'10'$$ then the state $${Q_A}{Q_B}$$ of the counter at $${t_n} + 3$$ (after three clock cycles) will be

A
$$00$$
B
$$01$$
C
$$10$$
D
$$11$$
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