1
GATE EE 2014 Set 2
MCQ (Single Correct Answer)
+2
-0.6
A $$JK$$ flip flop can be implemented by $$T$$ flip flops. Identify the correct implementation.
2
GATE EE 2013
MCQ (Single Correct Answer)
+2
-0.6
The clock frequency applied to the digital circuit shown in the figure below is $$1$$ $$kHz.$$ If the initial state of the output $$Q$$ of the flip-flop is $$‘0’,$$ then the frequency of the output waveform $$Q$$ in $$kHz$$ is
![GATE EE 2013 Digital Electronics - Sequential Circuits Question 13 English](https://imagex.cdn.examgoal.net/JuF43gblhVbIw5Lp6/QI5fRQQiPN2RqqwafqiHm2YxMo4UP/pdMEqrQBgdN6oGdd82jxJB/uploadfile.jpg)
3
GATE EE 2012
MCQ (Single Correct Answer)
+2
-0.6
The state transition diagram for the logic circuit shown is
![GATE EE 2012 Digital Electronics - Sequential Circuits Question 14 English](https://gateclass.cdn.examgoal.net/GAcbHxKakEtNVaDMB/L4iccSgUT63Vadbm4G0iBSzfsT9nx/IlaFKi2fqz0AEGrPd18nJ2/uploadfile.jpg)
4
GATE EE 2011
MCQ (Single Correct Answer)
+2
-0.6
A two-bit counter circuit is shown below
![GATE EE 2011 Digital Electronics - Sequential Circuits Question 15 English](https://gateclass.cdn.examgoal.net/kp2tp4r2A5HIRrhsG/0N9SM6ejnpylH7CfrUyYHQSjW6MNQ/KY5oEzrckRjNugTY0zXZJt/uploadfile.jpg)
It the state $${Q_A}{Q_B}$$ of the counter at the clock time $${t_n}$$ is $$'10'$$ then the state $${Q_A}{Q_B}$$ of the counter at $${t_n} + 3$$ (after three clock cycles) will be
Questions Asked from Sequential Circuits (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits