1
GATE EE 2017 Set 2
Numerical
+2
-0
For the synchronous sequential circuit shown below, the output $$Z$$ is zero for the initial conditions $${Q_A}{Q_B}{Q_C} = Q{'_A}Q{'_B}Q{'_C} = 100.$$

The minimum number if clock cycles after which the output $$Z$$ would again become zero is _____________.

2
GATE EE 2016 Set 1
+2
-0.6
The current state $${Q_A}{Q_B}$$ of a two $$JK$$ flip-flop system is $$00.$$ Assume that the clock rise-time is much smaller than the delay of the $$JK$$ flip-flop. The next state of the system is
A
$$00$$
B
$$01$$
C
$$11$$
D
$$10$$
3
GATE EE 2015 Set 2
+2
-0.6
In the following sequential circuit, the initial state (before the first clock pulse) of the circuit is $${Q_1}{Q_0}$$ $$=00.$$ The state $$\left( {{Q_1}{Q_0}} \right),$$ immediately after the $${333^{rd}}$$ clock pulse is
A
$$00$$
B
$$01$$
C
$$10$$
D
$$11$$
4
GATE EE 2015 Set 1
Numerical
+2
-0
The figure shows a digital circuit constructed using negative edge triggered $$J-K$$ flip flops. Assume a starting state of $${Q_2}\,{Q_1}\,{Q_0} = 000.$$ This state $${Q_2}\,{Q_1}\,{Q_0} = 000$$ will repeat after _____ number of cycles of the clock $$CLK.$$