GATE EE

Logic Families and Memories

Digital Electronics

(Past Years Questions)

Marks 1

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If $${X_1}$$ and $${X_2}$$ are the inputs to the circuit shown in the figure, the output $$Q$$ is ...
GATE EE 2005
The open collector outputs of two$$2$$-inputs $$NAND$$ gates are connected to a common pull up resistor. If the input to...
GATE EE 1998
In standard $$TTL$$ gates, the totem pole output stage is primarily used to
GATE EE 1998

Marks 2

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The $$TTL$$ circuit shown in the figure is fed with the waveform $$X$$ (also shown). All gates have equal propagation de...
GATE EE 2010
A TTL NOT gate circuit is shown in figure. Assuming $${V_{BE}} = 0.7\,v$$ of both the transistors, if $${V_i} = 3.0\,V,$...
GATE EE 2006

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