1
GATE EE 2023
Numerical
+2
-0
Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic states, which will not change with clock, is ___________.
Your input ____
2
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
$$A,B,C$$ and $$D$$ are input bits, and $$Y$$ is the output bit in the $$XOR$$ gate circuit of the figure below. Which of the following statements about the sum $$S$$ of $$A,B,C,D$$ and $$Y$$ is correct?
3
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
In the figure, as long as $${X_1} = 1$$ and $${X_2} = 1,$$ the output $$Q$$ remains
4
GATE EE 2004
MCQ (Single Correct Answer)
+2
-0.6
A digital circuit which compares two numbers $${A_3}{A_2}{A_1}{A_0},\,\,{B_3}{B_2}{B_1}{B_0}$$ is shown in Fig. To get output $$Y=0,$$ choose one pair of correct input numbers
Questions Asked from Logic Gates (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits