The following binary values were applied to the X and Y inputs of the NAND latch shown in the figure in the sequence indicated below: X=0, Y=1; X=0, Y=0; X=1, Y=1. The corresponding stable P, Q outputs will be

For the circuit shown, the counter state (Q₁ Q₀) follows the sequence

In the digital-to-Analog converter circuit shown in the figure below,
$${V_{R\,}}\, = \,10V$$ and $$R\, = \,10k\Omega $$

The voltage V₀ is

In the following circuit, X is given by