In the modulo-6 ripple counter shown in the figure, the output of the 2-input gate is used to clear the J-K flip-flops. The 2-input gate is

Figure shows the internal schematic of a TTL AND-OR-Invert (AOI) gate. For the inputs shown in Figure, the output Y is

Consider a 300$$\Omega $$, quarter-wave long (at 1 GHz) transmission line as shown in Fig. It is connected to a 10V, 50$$\Omega $$ sources at one end and is left open circuited at the other end. The magnitude of the voltage at the open circuit end of the line is

Consider an impedance Z = R + jX marked with point P in an impedance Smith chart as shown in Fig. The movement from point P along a constant resistance circle in the clockwise direction by an angle $${45^ \circ }$$ is equivalent to