GATE CSE 1990 | Memory Interfacing Question 52 | Computer Organization

GATE CSE 1990

Subjective

-0

A block -set associative cache memory consists of $$128$$ blocks divided into four block sets. The main memory consists of $$16,384$$ blocks and each blocks contains $$256$$ eight bit words.

(i) How many bits are required for addressing the main memory?

(ii) How many bits are needed to represent the TAG, SET and WORD fields?

GATE CSE Subjects

Theory of Computation

Undecidability Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine

Operating Systems

Process Concepts and Cpu Scheduling Synchronization and Concurrency File System IO and Protection Deadlocks Memory Management

Algorithms

Complexity Analysis and Asymptotic Notations Searching and Sorting Divide and Conquer Method Greedy Method P and NP Concepts Dynamic Programming

Digital Logic

K Maps Boolean Algebra Combinational Circuits Number Systems Sequential Circuits

Database Management System

Structured Query Language Transactions and Concurrency Functional Dependencies and Normalization Relational Algebra File Structures and Indexing Er Diagrams

Data Structures

Trees Hashing Arrays Linked List Graphs Stacks and Queues

Computer Networks

Concepts of Layering Lan Technologies and Wi-Fi Data Link Layer and Switching Network Layer Routing Algorithm TCP UDP Sockets and Congestion Control Application Layer Protocol Network Security

Software Engineering

Compiler Design

Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization

Web Technologies

General Aptitude

Verbal Ability Numerical Ability

Discrete Mathematics

Graph Theory Set Theory & Algebra Combinatorics Mathematical Logic Probability Linear Algebra Calculus

Programming Languages

Basic of Programming Language Function and Recursion Pointer and Structure in C

Computer Organization

Computer Arithmetic Memory Interfacing Machine Instructions and Addressing Modes IO Interface Pipelining Alu Data Path and Control Unit Secondary Memory