1
GATE EE 2010
+2
-0.6
The transistor circuit shown uses a silicon transistor with $${V_{BE}} = 0.7V,{{\rm I}_C} \approx {{\rm I}_E}$$ and a $$DC$$ current gain of $$100.$$ The value of $${V_0}$$ is A
$$4.65$$ $$V$$
B
$$5$$ $$V$$
C
$$6.3$$ $$V$$
D
$$7.32$$ $$V$$
2
GATE EE 2008
+2
-0.6
Two perfectly matched silicon transistors are connected as shown in the figure. Assuming the $$\beta$$ of the transistors to be very high and forward voltage drop to be $$0.7V,$$ the value of current $${\rm I}$$ is (assume diode $$(D)$$ is ideal) A
$$0$$ $$mA$$
B
$$3.6$$ $$mA$$
C
$$4.3$$ $$mA$$
D
$$5.7$$ $$mA$$
3
GATE EE 2006
+2
-0.6
Consider the circuit shown in figure. If the $$\beta$$ of the transistor is $$30$$ and $${{\rm I}_{CBO}}$$ is $$20$$ $$nA$$ and the input voltage is $$5V$$ then the transistor would be operating in A
Saturation region
B
Active region
C
Break down region
D
Cut-off region
4
GATE EE 2005
+2
-0.6
The common emitter amplifier shown in the figure is biased using a $$1mA$$ ideal current source. The approximate base current value is_____. A
$$0\,\mu A$$
B
$$10\,\mu A$$
C
$$100\,\mu A$$
D
$$1000\,\mu A$$
GATE EE Subjects
Electromagnetic Fields
Signals and Systems
Engineering Mathematics
General Aptitude
Power Electronics
Power System Analysis
Analog Electronics
Control Systems
Digital Electronics
Electrical Machines
Electric Circuits
Electrical and Electronics Measurement
EXAM MAP
Joint Entrance Examination