Consider a $$4$$-way set associative cache consisting of $$128$$ lines with a line size of $$64$$ words. The $$CPU$$ generates a $$20$$-bit address of a word in main memory. The numbers of bits in the TAG, LINE and WORD fields are respectively

Increasing the $$RAM$$ of a computer typically improves performance because

More than one word are put in one cache block to

The main memory of a computer has $$2$$ $$cm$$ blocks while the cache has $$2$$ $$c$$ blocks. If the cache uses the set associative mapping scheme with $$2$$ blocks per set, then block $$k$$ of the main memory maps to the set: