1
GATE CSE 2004
MCQ (Single Correct Answer)
+2
-0.6
A $$4$$-stage pipeline has the stage delays as $$150, 120,160$$ and $$140$$ nano seconds respectively. Registers that are used between the stages have a delay of $$5$$ nanoseconds each. Assuming constant clocking rate, the total time taken to process $$1000$$ data items on this pipeline will be
2
GATE CSE 2002
MCQ (Single Correct Answer)
+2
-0.6
The performance of a pipelined processor suffers if
Questions Asked from Pipelining (Marks 2)
Number in Brackets after Paper Indicates No. of Questions
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GATE CSE 2004 (1)
GATE CSE 2002 (1)
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