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Questions
PREVIOUS
1
GATE CSE 2002
MCQ (Single Correct Answer)
+2
-0.6
The performance of a pipelined processor suffers if
A
The pipeline stages have different delays
B
Consecutive instructions are depend on each other
C
The pipeline stages share single hardware resources
D
All of the above
PREVIOUS
GATE CSE Subjects
Theory of Computation
Undecidability Finite Automata and Regular Language Push Down Automata and Context Free Language Recursively Enumerable Language and Turing Machine
Operating Systems
Process Concepts and Cpu Scheduling Synchronization and Concurrency File System IO and Protection Deadlocks Memory Management
Algorithms
Complexity Analysis and Asymptotic Notations Searching and Sorting Divide and Conquer Method Greedy Method P and NP Concepts Dynamic Programming
Digital Logic
K Maps Boolean Algebra Combinational Circuits Number Systems Sequential Circuits
Database Management System
Er Diagrams Functional Dependencies and Normalization Structured Query Language Relational Algebra Transactions and Concurrency File Structures and Indexing
Data Structures
Arrays Stacks and Queues Linked List Trees Graphs Hashing
Computer Networks
Network Security Data Link Layer and Switching Application Layer Protocol Network Layer Routing Algorithm Concepts of Layering Lan Technologies and Wi-Fi TCP UDP Sockets and Congestion Control
Software Engineering
Software Engineering
Compiler Design
Lexical Analysis Parsing Syntax Directed Translation Code Generation and Optimization
Web Technologies
Web Technologies
General Aptitude
Verbal Ability Numerical Ability
Discrete Mathematics
Graph Theory Set Theory & Algebra Combinatorics Mathematical Logic Probability Linear Algebra Calculus
Programming Languages
Basic of Programming Language Function and Recursion Pointer and Structure in C
Computer Organization
Computer Arithmetic Memory Interfacing Machine Instructions and Addressing Modes IO Interface Pipelining Alu Data Path and Control Unit Secondary Memory
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