GATE ECE 2017 Set 2 | GATE ECE Year Wise Previous Years Questions

GATE ECE 2017 Set 2

Numerical

-0

The state diagram of a finite state machine (FSM) designed to detect an overlapping sequence of three bits is shown in the figure. The FSM has an input 'In' and an output 'Out'. The initial state of the FSM is S₀. GATE ECE 2017 Set 2 Digital Circuits - Sequential Circuits Question 21 English

GATE ECE 2017 Set 2 Digital Circuits - Sequential Circuits Question 21 English

If the input sequence is 10101101001101, starting with the left-most bit, then the number of times 'Out' will be 1 is __________.

Your input ____

GATE ECE 2017 Set 2

MCQ (Single Correct Answer)

-0.3

In a DRAM,

periodic refreshing is not required

information is stored in a capacitor

information is stored in a latch

both read and write operations can be performed simultaneously

GATE ECE 2017 Set 2

MCQ (Single Correct Answer)

-0.3

Consider the circuit shown in the figure. GATE ECE 2017 Set 2 Digital Circuits - Combinational Circuits Question 37 English

The Boolean expression F implemented by the circuit is

$$\overline X \,\overline Y \,\overline Z + XY + \,\overline Y \,Z$$

$$\overline X \,Y\,\overline Z + XZ + \,\overline Y \,Z$$

$$\overline X \,Y\,\overline Z + XY + \,\overline Y \,Z$$

$$\overline X \,\overline Y \,\overline Z + XZ + \,\overline Y \,Z$$

GATE ECE 2017 Set 2

MCQ (Single Correct Answer)

-0.6

A programmable logic array (PLA) is shown in the figure. GATE ECE 2017 Set 2 Digital Circuits - Combinational Circuits Question 19 English

The Boolean function F implemented is

$$\overline P \,\overline {Q\,} R + \overline P QR + P\overline {Q\,} \overline R $$

$$(\overline P \, + \overline {Q\,} + \,R)(\overline P \, + Q + R) + (P + \overline P \, + \overline R )$$

$$\overline P \,\overline {Q\,} R + \overline P QR + P\overline {Q\,} \,\overline R $$

$$(\overline P + \,\overline {Q\,} \, + R)(\overline P + Q + R) + (P + \overline {Q\,} + R)$$

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