1
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+1
-0.3
For the circuit shown in the figure, P and Q are the inputs and Y is the output.
The logic implemented by the circuit is
2
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+2
-0.6
Assuming that transistor M1 and M2 are identical and have a threshold voltage of 1V, the state of transistors M1 and M2 are respectively
3
GATE ECE 2017 Set 2
MCQ (Single Correct Answer)
+2
-0.6
Two n-channel MOSFETs, T1 and T2, are identical in all respects except that the width of T2 is double of T1. Both the transistor are biased in the saturation region of operation, but the gate overdrive voltage (VGS - VTH) of T2 is double that of T1, where VGS and VTH are the gate-to-source voltage and threshold voltage of the transistors, respectively. If the drain current and transconductance of T1 are ID1 and gm1 respectively ; the corresponding values of these two parameters for T2 are
4
GATE ECE 2017 Set 2
Numerical
+2
-0
A MOS capacitor is fabricated on p-type Si (silicon) where the metal work function is 4.1 eV
and electron affinity of Si is 4.0 eV, Ec - EF = 0.9 eV; where Ec and EF are conduction band minimum and the Fermi energy levels of Si, respectively. Oxide$${\varepsilon _r} = \,\,3.9,\,\,\,{\varepsilon _{0\,\,}}=\,8.85 \times {10^{ - 14}}$$ F/cm, oxide thickness $${t_{ox}} = 0.1\,\mu m$$
and electronic charge q = $$1.6 \times {10^{ - 19}}$$ C. If the measured flat band
voltage of the capacitor is –1V, then the magnitude of the fixed charge at the oxide semiconductor
interface, in nC/cm2, is __________.
Your input ____
Paper analysis
Total Questions
Analog Circuits
3
Communications
6
Control Systems
6
Digital Circuits
5
Electromagnetics
5
Electronic Devices and VLSI
9
Engineering Mathematics
9
Network Theory
4
Signals and Systems
6
General Aptitude
10
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