For the circuit shown in the figure, P and Q are the inputs and Y is the output. The logic implemented by the circuit is

Consider an n-channel MOSFET having width W, length L, electron mobility in the channel $$\mu_n$$ and oxide capacitance per unit area $$C_{ox}$$. If gate-to-source voltage V_GS=0.7 V, drain-to source voltage V_DS=0.1V, $$\left(\mu_nC_{ox}\right)\;=\;100\;\mu A/V^2$$, threshold voltage V_TH=0.3 V and (W/L) = 50, then the transconductance g_m (in mA/V) is ___________.

Assuming that transistor M₁ and M₂ are identical and have a threshold voltage of 1V, the state of transistors M₁ and M₂ are respectively

A MOS capacitor is fabricated on p-type Si (silicon) where the metal work function is 4.1 eV and electron affinity of Si is 4.0 eV, E_c - E_F = 0.9 eV; where E_c and E_F are conduction band minimum and the Fermi energy levels of Si, respectively. Oxide$${\varepsilon _r} = \,\,3.9,\,\,\,{\varepsilon _{0\,\,}}=\,8.85 \times {10^{ - 14}}$$ F/cm, oxide thickness $${t_{ox}} = 0.1\,\mu m$$ and electronic charge q = $$1.6 \times {10^{ - 19}}$$ C. If the measured flat band voltage of the capacitor is –1V, then the magnitude of the fixed charge at the oxide semiconductor interface, in nC/cm², is __________.