GATE ECE 1997

## GATE ECE

The transistor in the circuit shown in the figure. is so biased (dc biasing N/W is not shown) that the dc collector curr

View Question In the cascade amplifier circuit shown below, determine the values of R1, R2 and RL. Such that the quiescent current thr

View Question An Amplifier a has 6 dB gain and 50 $$\Omega $$ input and output impedances. The noise figure of this Amplifier as show

View Question Negative feedback in
1. Voltage series configuration
2.Current shunt configuration
(a) increases input impedance
(b)

View Question An IC 555 chip has been used to construct a pulse generator. Typical pin connections with components is shown below in f

View Question The output voltage V0 of the circuit shown in the figure is

View Question Consider the circuit given in fig. using an ideal operational Amplifier.
The characteristics of the diode are given by

View Question The line code that has zero dc component for pulse transmission of random binary data is

View Question A deterministic signal has the power spectrum given in figure. The minimum sampling rate needed to completely represent

View Question A probability density function is given by $$p(x) = \,K\,\,\exp \,\,( - \,{x^2}/2),\,\, - \,\infty \, < \,x < \,\i

View Question In the signal flow graph of Fig. y/x equals

View Question Following fig. shows the block diagram representation of control system. The system in
block A has an impulse response
h

View Question A certain linear time invariant system has the state and the output equations given below
$$$\left[ {\matrix{
{\matho

View Question
For the circuit shown in the figure, choose state variables as $${x_{1,}}{x_{2,}}{x_3}$$ to be $${i_{L1}}\left( t \rig

View Question A signed integer has been stored in a byte using the 2's complement format. We
wish to store the same integer in a 16-bi

View Question The output of the logic gate in figure is

View Question A 2-bit binary multiplier can be implemented using

View Question In a J_K flip-flop, we have J=$$\overline Q $$ and K=1 (see figure). Assuming the flip-flop was intially cleared and the

View Question In standard TTL the 'totem pole' stage refers to

View Question The inverter 74AL SO4 has the following specifications:
$${I_{OH}}{\,_{\max \,}} = \, - $$ 0.4mA, $${I_{OL}}$$ max =

View Question For the NMOS logic gate shown in figure, the logic function implemented is

View Question The gate delay of an NMOS inverter is dominated by charge time rather than discharge time because

View Question A sequence generator is shown in figure. The counter status (Q0 Q1 Q3) is intialized to 010 using preset/clear inputs.
T

View Question A transmission line of 50$$\Omega $$ characteristic impedance is terminated with a 100 $$\Omega $$ resistance. The minim

View Question A $${\lambda \over 2}$$ section of a 600 $$\Omega $$ transmission line, short ciruited at one end and open circuited at

View Question A uniform plane wave is normally incident from air on an infinitely thick magnetic material with relative permeability 1

View Question A rectangular air-filled waveguide has a cross section of $$4\,cm\,\, \times \,\,10cm$$. The minimum frequency which can

View Question A parabolic dish antenna has a conical beam 20 wide. The directivity of the antenna is approximately

View Question A dipole antenna has a sin$$\theta $$ radiation pattern where the angle $$\theta $$ is measured from the axis of the dip

View Question The units of $$\frac q{KT}$$ are

View Question The curve given by the equation $${x^2} + {y^2} = 3axy$$ is

View Question The laplace transform of $${e^{\alpha t}}\,\cos \,\alpha \,t$$ is equal to ____________.

View Question In an 8085$$\mu$$P system, the RST instruction will cause an interrupt

View Question The decoding circuit shown below has been used to generate the active low chip select signal for a microprocessor periph

View Question The following instructions have been executed by an 8085 $$\mu $$P
From which address will be text instruction be fetc

View Question The current "i4" in the circuit of Fig. is equal to

View Question The voltage V in Fig. is equal to

View Question The voltage V in Fig. is always equal to

View Question The voltage V in Fig. is

View Question In the circuit of Fig. when R = 0 Ω, the current iR equals 10 A.
(a) Find the value of R for which it absorbs maximum p

View Question
For the circuit shown in Fig. choose state variables $$X_1,\;X_2,\;X_3$$ to be $$i_{L1}\left(t\right),\;v_{C2}\left(t\r

View Question In the circuit of Fig., the current iD through the ideal diode (zero cut in voltage and zero forward resistance) equals

View Question In the circuit of Fig., energy absorbed by the 4 Ω registor in the time interval (0,$$\infty$$) is

View Question In the circuit of Fig., all currents and voltage are sinusoids of frequency $$\omega $$ rad/sec.
(a) Find the impedanc

View Question In the circuil of Fig. the equivalent impedance seen across terminals A. B is

View Question The function f(t) has the Fourier Transform g($$\omega $$). The Fourier Transform of $$$g(t) = \left( {\int\limits_{ - \

View Question The power spectral density of a deterministic signal is given by $${\left[ {\sin (f)/f} \right]^2}$$, where 'f' is frequ

View Question If the Fourier Transfrom of a deterministic signal g(t) is G (f), then
Item-1
(1) The Fourier transform of g (t -

View Question The Laplace Transform of eat .cos$$\left( {\alpha t} \right).u\left( t \right)$$ is equal to

View Question Match each of the items 1, 2 on the left with the most appropriate item A, B, C or D on the right.
In the case of a lin

View Question Fig.1, shows the block diagram representation of a control system. The system in block A has an impulse response $${h_A}

View Question In Fig. 1, a linear time invariant discrete system is shown. Blocks labeled D represent unit delay elements. For $$n\, &

View Question