1
GATE ECE 1997
Subjective
+5
-0
A sequence generator is shown in figure. The counter status (Q0 Q1 Q3) is intialized to 010 using preset/clear inputs.
The Clock has a period of 50ns and transitions take place at the rising clock edge.
(a) Give the sequence generated at Q0 till it repeats.
(b) What is the repetition rate for the generated sequence? GATE ECE 1997 Digital Circuits - Sequential Circuits Question 16 English
2
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The inverter 74AL SO4 has the following specifications:
$${I_{OH}}{\,_{\max \,}} = \, - $$ 0.4mA, $${I_{OL}}$$ max = 8mA, $${I_{IH}}$$ max = $$\mu $$A , $${I_{IL\,}}_{\max \,}$$=0.1mA. The fan out based on the above will be
A
10
B
20
C
60
D
100
3
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
A signed integer has been stored in a byte using the 2's complement format. We wish to store the same integer in a 16-bit word. We should
A
copy the original byte to the less significant byte of the word and fill the more significant with zeros
B
copy the original byte to the more significant byte of the word and fill the less significant with zeros
C
copy the original byte to the less significant byte of the word and make each bit of the more significant byte equal to the most significant bit of the original byte
D
copy the original byte to the less significant byte as well as the more significant byte of the word
4
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The output of the logic gate in figure is GATE ECE 1997 Digital Circuits - Logic Gates Question 32 English
A
0
B
1
C
$$\overline A \,$$
D
A
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