The decoding circuit shown below has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $${A_0}$$ to $${A_7}$$ for I-O address)

The following instructions have been executed by an 8085 $$\mu $$P
From which address will be text instruction be fetched?

In an 8085$$\mu$$P system, the RST instruction will cause an interrupt

In the circuit of Fig., all currents and voltage are sinusoids of frequency $$\omega $$ rad/sec.

(a) Find the impedance to the right of $$\left( {A,\,\,\,\,\,\,B} \right)$$ at $$\omega \,\,\, = \,\,\,\,0$$ rad/sec and $$\omega \,\,\, = \,\,\,\,\infty $$ rad/sec.

(b) If $$\omega \,\,\, = \,\,\,\,{\omega _0}$$ rad/sec and $${i_1}\left( t \right) = \,\,{\rm I}\,\,\,\sin \,\left( {{\omega _0}t} \right)\,{\rm A},$$ where $${\rm I}$$ is positive, $${{\omega _0}\,\, \ne \,\,0}$$, $${{\omega _0}\,\, \ne \,\,\infty }$$, then find $${\rm I}$$, $${{\omega _0}}$$ and $${i_2}\left( t \right)$$