1
GATE ECE 1997
Subjective
+5
-0
Following fig. shows the block diagram representation of control system. The system in block A has an impulse response h(t ) = e−t u(t ). The system in block B has an impulse response h(t ) = e−2t u(t ). The block 'K' amplifies its inputs by a factor k. For the overall system with input x(t) and output y(t). GATE ECE 1997 Control Systems - Time Response Analysis Question 10 English (a) Find the transfer function $$\frac{y\left(s\right)}{x\left(s\right)}$$ when k =1.
(b) Find the impulse response when k = 0.
(c) Find the values of k for which the system becomes unstable.
2
GATE ECE 1997
Subjective
+5
-0
GATE ECE 1997 Control Systems - State Space Analysis Question 9 English

For the circuit shown in the figure, choose state variables as $${x_{1,}}{x_{2,}}{x_3}$$ to be $${i_{L1}}\left( t \right),{v_{c2}}\left( t \right),{i_{L3}}\left( t \right)$$

Wriote the state equations

$$$\left[ {\matrix{ {\mathop {{x_1}}\limits^ \bullet } \cr {\mathop {{x_2}}\limits^ \bullet } \cr {\mathop {{x_3}}\limits^ \bullet } \cr } } \right] = A\left[ {\matrix{ {{x_1}} \cr {{x_2}} \cr {{x_3}} \cr } } \right] + B\left[ {e\left( t \right)} \right]$$$
3
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
For the NMOS logic gate shown in figure, the logic function implemented is GATE ECE 1997 Digital Circuits - Logic Families Question 20 English
A
$$\overline {ABCDE} $$
B
$$(AB + \overline C ).(\overline {D + E} )$$
C
$$\overline {A.(B + C) + D.E} $$
D
$$(\overline {A + B} ).C + \overline D .\overline E $$
4
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The gate delay of an NMOS inverter is dominated by charge time rather than discharge time because
A
the driver transistor has a larger threshold voltage than the load transistor.
B
the driver transistor has larger leakage currents compared to the load transistor.
C
the load transistor has a smaller W/L ratio compared to the driver transistor
D
none of the above
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