1
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
In an 8085$$\mu$$P system, the RST instruction will cause an interrupt
A
only if an interrupt service routine is not being executed
B
only if a bit in the interrupt mask is made 0
C
only if interrupts have been enabled by an EI instruction
D
None of the above
2
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The decoding circuit shown below has been used to generate the active low chip select signal for a microprocessor peripheral. (The address lines are designated as $${A_0}$$ to $${A_7}$$ for I-O address) GATE ECE 1997 Microprocessors - Pin Details of 8085 and Interfacing with 8085 Question 3 English
A
60 H to H
B
A 4 H to A7 H
C
50 H to AF H
D
70 H to 73 H
3
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3
The following instructions have been executed by an 8085 $$\mu $$P GATE ECE 1997 Microprocessors - Instruction Set and Programming with 8085 Question 27 English
From which address will be text instruction be fetched?
A
6019
B
0379
C
6979
D
None of the above
4
GATE ECE 1997
MCQ (Single Correct Answer)
+1
-0.3

The current "i4" in the circuit of Fig. is equal to

GATE ECE 1997 Network Theory - Network Elements Question 47 English
A
12 A
B
-12 A
C
4 A
D
None of the above
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