1
MHT CET 2026 16th April Morning Shift
MCQ (Single Correct Answer)
+1
-0
The resultant gate and its Boolean expression in the given circuit is
MHT CET 2026 16th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 19 English
A
$\text{AND}, \overline{\text{A} + \text{B}}$
B
$\text{NAND}, \text{A} + \text{B}$
C
$\text{OR}, \text{A} + \text{B}$
D
$\text{NOR}, \text{A} - \text{B}$
2
MHT CET 2026 16th April Morning Shift
MCQ (Single Correct Answer)
+1
-0
When a small amount of impurity atoms are added to a semiconductor then generally its resistivity
A
increases
B
decreases
C
does not change
D
may increase or decrease depending upon the percentage of doping
3
MHT CET 2026 15th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In the logic circuit diagram, when all the four inputs, A, B, C, D are 'one' the outputs $Y_1$, $Y_2$, $Y_3$ are respectively (1, 1, 0). When the inputs A and C are changed to zero and B and D are still 'one', then the outputs $Y_1$, $Y_2$, $Y_3$ are respectively change to
MHT CET 2026 15th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 17 English
A
$1, 1, 1$
B
$1, 0, 0$
C
$0, 1, 0$
D
$0, 0, 1$
4
MHT CET 2026 15th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In the diagram shown, the resistance between points A and B is '$R_1$' when an ideal diode D is forward biased and is '$R_2$' when ideal diode D is reverse biased. The ratio $R_1 / R_2$ is
MHT CET 2026 15th April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 16 English
A
$2$
B
$1$
C
$\dfrac{1}{2}$
D
$\dfrac{1}{4}$

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