1
MHT CET 2025 25th April Morning Shift
MCQ (Single Correct Answer)
+1
-0

The logic gate for which the output goes 'HIGH' or ' 1 ' only when an odd number of 'HIGH' or ' 1 ' are at its input, is

A
OR gate
B
NAND gate
C
Ex-OR gate
D
NOR gate
2
MHT CET 2025 25th April Morning Shift
MCQ (Single Correct Answer)
+1
-0

To get output of the following logic circuit as ' 0 ' (zero), the inputs $A, B, C$ should NOT be, respectively,

MHT CET 2025 25th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 2 English
A
$1,1,0$
B
$0,1,0$
C
$1,0,1$
D
$0,0,1$
3
MHT CET 2025 25th April Morning Shift
MCQ (Single Correct Answer)
+1
-0

In which of the following figures, the p.n. junction diode is reverse biased?

MHT CET 2025 25th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 3 English 1MHT CET 2025 25th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 3 English 2MHT CET 2025 25th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 3 English 3MHT CET 2025 25th April Morning Shift Physics - Semiconductor Devices and Logic Gates Question 3 English 4
A
c
B
d
C
b
D
a
4
MHT CET 2025 23rd April Evening Shift
MCQ (Single Correct Answer)
+1
-0

I - V characteristics of photodiode for different illumination intensities $\mathrm{I}_1, \mathrm{I}_2, \mathrm{I}_3$ and $\mathrm{I}_4$ are drawn as follows. Then the maximum intensity among them is

MHT CET 2025 23rd April Evening Shift Physics - Semiconductor Devices and Logic Gates Question 4 English
A
$\quad \mathrm{I}_1$
B
$\quad \mathrm{I}_2$
C
$\mathrm{I}_3$
D
$\quad \mathrm{I}_4$
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