1
MHT CET 2026 15th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In the logic circuit diagram, when all the four inputs, A, B, C, D are 'one' the outputs $Y_1$, $Y_2$, $Y_3$ are respectively (1, 1, 0). When the inputs A and C are changed to zero and B and D are still 'one', then the outputs $Y_1$, $Y_2$, $Y_3$ are respectively change to


2
MHT CET 2026 15th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In the diagram shown, the resistance between points A and B is '$R_1$' when an ideal diode D is forward biased and is '$R_2$' when ideal diode D is reverse biased. The ratio $R_1 / R_2$ is


3
MHT CET 2026 15th April Evening Shift
MCQ (Single Correct Answer)
+1
-0
In common emitter amplifier, a change of $0.2$ mA in the base current causes a change of $5$ mA in the collector current. If input resistance is $2$ k$\Omega$ and voltage gain is $75$, the load resistance used in the circuit is
4
MHT CET 2026 15th April Morning Shift
MCQ (Single Correct Answer)
+1
-0
Photodiode is a device
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