1
MHT CET 2023 9th May Morning Shift
+1
-0

For an intrinsic semiconductor $$\left(\mathrm{n}_{\mathrm{h}}\right.$$ and $$\mathrm{n}_{\mathrm{e}}$$ are the number of holes per unit volume and number of electrons per unit volume respectively)

A
$$\mathrm{n}_{\mathrm{h}} < \mathrm{n}_{\mathrm{e}}$$
B
$$\mathrm{n}_{\mathrm{h}}=\mathrm{n}_{\mathrm{e}}$$
C
$$\mathrm{n}_{\mathrm{h}}=\frac{\mathrm{n}_{\mathrm{c}}}{2}$$
D
$$\mathrm{n}_{\mathrm{h}}>\mathrm{n}_{\mathrm{e}}$$
2
MHT CET 2023 9th May Morning Shift
+1
-0

A $$5.0 \mathrm{~V}$$ stabilized power supply is required to be designed using a $$12 \mathrm{~V}$$ DC power supply as input source. The maximum power rating of zener diode is $$2.0 \mathrm{~W}$$. The minimum value of resistance $$R_{\mathrm{s}}$$ in $$\Omega$$ connected in series with zener diode will be

A
16.5
B
17.5
C
18.5
D
15.5
3
MHT CET 2023 9th May Morning Shift
+1
-0

To get the truth table shown, from the following logic circuit, the Gate G should be

A
OR
B
AND
C
NOR
D
NAND
4
MHT CET 2022 11th August Evening Shift
+1
-0

For a NAND gate, the inputs and outputs are given below.

Input A Input B Output Y
0 1 $$\mathrm{C}$$
0 0 $$\mathrm{D}$$
1 0 $$\mathrm{E}$$
1 1 $$\mathrm{F}$$

The values taken by C, D, E, F are respectively

A
0, 1, 0, 0
B
1, 1, 1, 0
C
1, 0, 1, 1
D
0, 1, 0, 1
EXAM MAP
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