MHT CET 2024 9th May Morning Shift | Semiconductor Devices and Logic Gates Question 44 | Physics

For the diagram shown, the resistance between points A and B when the ideal diode ' $D$ ' is forward biased is ' $R_1$ ' and that when reverse biased is ' $R_2$ '. The ratio $\frac{R_1}{R_2}$ is

MHT CET 2024 9th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 39 English

$\frac{2}{3}$

$\frac{2}{5}$

$\frac{3}{2}$

$\frac{5}{2}$

MHT CET 2024 4th May Evening Shift

MCQ (Single Correct Answer)

-0

The truth table for the given logic circuit is

MHT CET 2024 4th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 43 English

MHT CET 2024 4th May Evening Shift

MCQ (Single Correct Answer)

-0

In the circuit diagram shown in figure, the current through the zener diode is

MHT CET 2024 4th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 42 English

30 mA

17.5 mA

15 mA

12.5 mA

MHT CET 2024 4th May Evening Shift

MCQ (Single Correct Answer)

-0

The depletion layer in p-n junction region is caused by

drift of electrons.

migration of impurity ions.

diffusion of charge carries.

drift of holes.

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